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74ALVC245
Octal bus transceiver; 3-state
Rev. 02 -- 7 January 2008 Product data sheet
1. General description
The 74ALVC245 is an octal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The 74ALVC245 features an output enable input (OE) for easy cascading and send/receive input (DIR) for direction control. OE controls the outputs, so that the buses are effectively isolated.
2. Features
s Wide supply voltage range from 1.65 V to 3.6 V s Complies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.5 V) x JESD8B/JESD36 (2.7 V to 3.6 V) s 3.6 V tolerant inputs/outputs s CMOS low-power consumption s Direct interface with TTL levels (2.7 V to 3.6 V) s Power-down mode s Latch-up performance exceeds 250 mA s ESD protection: x HBM JESD22-A114E exceeds 2000 V x MM JESD22-A115-A exceeds 200 V
3. Ordering information
Table 1. Ordering information Package Temperature range 74ALVC245D 74ALVC245PW 74ALVC245BQ -40 C to +85 C -40 C to +85 C -40 C to +85 C Name SO20 TSSOP20 DHVQFN20 Description plastic small outline package; 20 leads; body width 7.5 mm plastic thin shrink small outline package; 20 leads; body width 4.4 mm Version SOT163-1 SOT360-1 Type number
plastic dual in-line compatible thermal enhanced SOT764-1 very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm
NXP Semiconductors
74ALVC245
Octal bus transceiver; 3-state
4. Functional diagram
1
DIR OE
19
2
A0 B0 18
3
A1 B1 17 19 B2 16 1 G3 3EN1 3EN2
4
A2
5
A3 B3 15 2 B4 14 3 4 B5 13 5 6 B6 12 7 8 B7 11 9
1 2 18 17 16 15 14 13 12 11
mna175
6
A4
7
A5
8
A6
9
A7
mna174
Fig 1. Logic symbol
Fig 2. IEC logic symbol
74ALVC245_2
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 -- 7 January 2008
2 of 14
NXP Semiconductors
74ALVC245
Octal bus transceiver; 3-state
5. Pinning information
5.1 Pinning
terminal 1 index area A0 A1 DIR A0 A1 A2 A3 A4 A5 A6 A7 1 2 3 4 5 6 7 8 9 20 VCC 19 OE 18 B0 17 B1 16 B2 15 B3 14 B4 GND 10 12 B6 11 B7
001aac431
2 3 4 5
20 VCC 19 OE 18 B0 17 B1 16 B2 15 B3 14 B4 13 B5 12 B6 B7 11
A2 A3 A4 A5 A6 A7
6 7 8 9 GND(1)
245
13 B5
1
DIR
245
GND 10
001aac432
Transparent top view
(1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input.
Fig 3. Pin configuration SO20, TSSOP20
Fig 4. Pin configuration DHVQFN20
5.2 Pin description
Table 2. Symbol DIR A[0:7] B[0:7] GND OE VCC Pin description Pin 1 2, 3, 4, 5, 6, 7, 8, 9 18, 17, 16, 15, 14, 13, 12, 11 10 19 20 Description direction control data input/output data input/output ground (0 V) output enable input (active LOW) supply voltage
6. Functional description
Table 3. Input OE L L H
[1]
Function table[1] Input/output DIR L H X An A=B input Z Bn input B=A Z
H = HIGH voltage level; L = LOW voltage level; X = don't care; Z = high-impedance OFF-state.
74ALVC245_2
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 -- 7 January 2008
3 of 14
NXP Semiconductors
74ALVC245
Octal bus transceiver; 3-state
7. Limiting values
Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC VI IIK IOK VO Parameter supply voltage input voltage input clamping current output clamping current output voltage VI < 0 V VO > VCC or VO < 0 V output HIGH or LOW state output 3-state power-down mode, VCC = 0 V IO ICC IGND Tstg Ptot output current supply current ground current storage temperature total power dissipation Tamb = -40 C to +85 C SO20 package TSSOP20 package DHVQFN20 package
[1] [2] [3] [4] [5] [6] The minimum input voltage ratings may be exceeded if the input current ratings are observed. The output voltage ratings may be exceeded if the output current ratings are observed. When VCC = 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation. Ptot derates linearly with 8 mW/K above 70 C. Ptot derates linearly with 5.5 mW/K above 60 C. Ptot derates linearly with 4.5 mW/K above 60 C.
[4] [5] [6] [2] [2] [3] [1]
Conditions
Min -0.5 -0.5 -50 -0.5 -0.5 -0.5 -100 -65 -
Max +4.6 +4.6 50 +4.6 +4.6 50 100 +150 500 500 500
Unit V V mA mA V V mA mA mA C mW mW mW
VCC + 0.5 V
VO = 0 V to VCC
8. Recommended operating conditions
Table 5. Symbol VCC VI VO Recommended operating conditions Parameter supply voltage input voltage output voltage output HIGH or LOW state output 3-state power-down mode, VCC = 0 V Tamb t/V ambient temperature input transition rise and fall rate VCC = 1.65 V to 2.7 V VCC = 2.7 V to 3.6 V Conditions Min 1.65 0 0 0 0 -40 Max 3.6 3.6 VCC 3.6 3.6 +85 20 10 Unit V V V V V C ns/V ns/V
74ALVC245_2
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 -- 7 January 2008
4 of 14
NXP Semiconductors
74ALVC245
Octal bus transceiver; 3-state
9. Static characteristics
Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH HIGH-level input voltage Conditions Min VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VIL LOW-level input voltage VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VOH HIGH-level output voltage VI = VIH or VIL IO = 100 A; VCC = 1.65 V to 3.6 V IO = 6 mA; VCC = 1.65 V IO = 12 mA; VCC = 2.3 V IO = 18 mA; VCC = 2.3 V IO = 12 mA; VCC = 2.7 V IO = 18 mA; VCC = 3.0 V IO = 24 mA; VCC = 3.0 V VOL LOW-level output voltage VI = VIH or VIL IO = -100 A; VCC = 1.65 V to 3.6 V IO = -6 mA; VCC = 1.65 V IO = -12 mA; VCC = 2.3 V IO = -18 mA; VCC = 2.3 V IO = -12 mA; VCC = 2.7 V IO = -18 mA; VCC = 3.0 V IO = -24 mA; VCC = 3.0 V IOZ II IOFF ICC ICC CI CI/O
[1] [2]
-40 C to +85 C Typ[1] 0.1 0.1 0.1 0.2 5 3.5 3.5 Max 0.7 0.8 0.2 0.3 0.4 0.6 0.4 0.4 0.55 10.0 5.0 10.0 10 750 0.65 x VCC 1.7 2.0 VCC - 0.2 1.25 1.8 1.7 2.2 2.4 2.2 [2]
Unit V V V V V V V V V V V V V V V V V V V A A A A A pF pF
0.35 x VCC V
OFF-state output current input leakage current supply current additional supply current input capacitance input/output capacitance
VI = VIH or VIL; VO = VCC or GND; VCC = 3.6 V VI = VCC or GND; VCC = 3.6 V VI = VCC or GND; IO = 0 A; VCC = 3.6 V per input pin; VCC = 3.0 V to 3.6 V; VI = VCC - 0.6 V; IO = 0 A;
-
power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V
All typical values are measured at VCC = 3.3 V and Tamb = 25 C. For transceivers, the parameter IOZ includes the input leakage current.
74ALVC245_2
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 -- 7 January 2008
5 of 14
NXP Semiconductors
74ALVC245
Octal bus transceiver; 3-state
10. Dynamic characteristics
Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7. Symbol tpd Parameter Conditions Min propagation delay An to Bn; Bn to An; see Figure 5 VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V VCC = 3.0 V to 3.6 V ten enable time OE to An; OE to Bn; see Figure 6 VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V VCC = 3.0 V to 3.6 V tdis disable time OE to An; OE to Bn; see Figure 6 VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V VCC = 3.0 V to 3.6 V CPD power dissipation capacitance per buffer; VI = GND to VCC; VCC = 3.3 V outputs enabled outputs disabled
[1] [2] All typical values are measured at Tamb = 25 C and VCC = 1.8 V, 2.5 V, 2.7 V and 3.3 V. tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL x VCC2 x fo) = sum of the outputs.
[3] [2] [2] [2]
-40 C to +85 C Typ[1] 2.7 2.1 3.0 2.3 4.0 3.0 2.6 2.9 4.4 2.3 3.3 3.2 25 1 Max 6.0 3.5 3.6 3.4 8.6 6.0 6.3 5.5 8.0 4.8 5.3 5.5 -
Unit
1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 -
ns ns ns ns ns ns ns ns ns ns ns ns pF pF
[3]
74ALVC245_2
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 -- 7 January 2008
6 of 14
NXP Semiconductors
74ALVC245
Octal bus transceiver; 3-state
11. Waveforms
VI An, Bn input GND tPLH VOH Bn, An output VOL VM VM
mna176
VM
VM
tPHL
Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load.
Fig 5. Propagation delay input (An, Bn) to output (Bn, An)
VI OE input GND t PLZ VCC output LOW-to-OFF OFF-to-LOW VOL t PHZ VOH output HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs disabled outputs enabled
mna367
VM
t PZL
VM VX t PZH VY VM
Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6. Enable and disable times Table 8. VCC 1.65 V to 1.95 V 2.3 V to 2.7 V 2.7 V 3.0 V to 3.6 V Measurement points Input VI VCC VCC 2.7 V 2.7 V VM 0.5 x VCC 0.5 x VCC 1.5 V 1.5 V Output VM 0.5 x VCC 0.5 x VCC 1.5 V 1.5 V VX VOL + 0.15 V VOL + 0.15 V VOL + 0.3 V VOL + 0.3 V VY VOH - 0.15 V VOH - 0.15 V VOH - 0.3 V VOH - 0.3 V
Supply voltage
74ALVC245_2
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 -- 7 January 2008
7 of 14
NXP Semiconductors
74ALVC245
Octal bus transceiver; 3-state
VI negative pulse 0V
tW 90 % VM 10 % tf tr tr tf 90 % VM 10 % tW
VEXT VCC VI VO
RL
VM
VI positive pulse 0V
VM
G
RT
DUT
CL RL
001aae331
Test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator CL = Load capacitance including jig and probe capacitance RL = Load resistor
Fig 7. Load circuitry for switching times Table 9. VCC 1.65 V to 1.95 V 2.3 V to 2.7 V 2.7 V 3.0 V to 3.6 V Test data Input VI VCC VCC 2.7 V 2.7 V tr, tf 2.0 ns 2.0 ns 2.5 ns 2.5 ns Load CL 30 pF 30 pF 50 pF 50 pF RL 1 k 500 500 500 VEXT tPLH, tPHL open open open open tPLZ, tPZL 2 x VCC 2 x VCC 6V 6V tPHZ, tPZH GND GND GND GND
Supply voltage
74ALVC245_2
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 -- 7 January 2008
8 of 14
NXP Semiconductors
74ALVC245
Octal bus transceiver; 3-state
12. Package outline
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
D
E
A X
c y HE vMA
Z 20 11
Q A2 A1 pin 1 index Lp L 1 e bp 10 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.1 A1 0.3 0.1 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 13.0 12.6 0.51 0.49 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.05 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 Z
(1)
0.9 0.4
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
0.419 0.043 0.055 0.394 0.016
0.035 0.004 0.016
8 o 0
o
Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT163-1 REFERENCES IEC 075E04 JEDEC MS-013 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-19
Fig 8. Package outline SOT163-1 (SO20)
74ALVC245_2 (c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 -- 7 January 2008
9 of 14
NXP Semiconductors
74ALVC245
Octal bus transceiver; 3-state
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
D
E
A
X
c y HE vMA
Z
20
11
Q A2 pin 1 index A1 (A 3) A
Lp L
1
e bp
10
wM detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 6.6 6.4 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.5 0.2 8 o 0
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19
Fig 9. Package outline SOT360-1 (TSSOP20)
74ALVC245_2 (c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 -- 7 January 2008
10 of 14
NXP Semiconductors
74ALVC245
Octal bus transceiver; 3-state
DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT764-1 20 terminals; body 2.5 x 4.5 x 0.85 mm
D
B
A
A A1 E c
terminal 1 index area
detail X
terminal 1 index area e 2 L
e1 b 9 vMCAB wM C y1 C
C y
1 Eh 20
10 e 11
19 Dh 0
12 X 2.5 scale 5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. 1 A1 0.05 0.00 b 0.30 0.18 c 0.2 D (1) 4.6 4.4 Dh 3.15 2.85 E (1) 2.6 2.4 Eh 1.15 0.85 e 0.5 e1 3.5 L 0.5 0.3 v 0.1 w 0.05 y 0.05 y1 0.1
Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION SOT764-1 REFERENCES IEC --JEDEC MO-241 JEITA --EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27
Fig 10. Package outline SOT764-1 (DHVQFN20)
74ALVC245_2 (c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 -- 7 January 2008
11 of 14
NXP Semiconductors
74ALVC245
Octal bus transceiver; 3-state
13. Abbreviations
Table 10. Acronym CDM CMOS DUT ESD HBM MM TTL Abbreviations Description Charged Device Model Complementary Metal Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Machine Model Transistor-Transistor Logic
14. Revision history
Table 11. Revision history Release date 20080107 Data sheet status Product data sheet Change notice Supersedes 74ALVC245_1 Document ID 74ALVC245_2 Modifications:
* * * * *
The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Section 3: DHVQFN20 package added. Section 7: derating values added for DHVQFN20 package. Section 12: outline drawing added for DHVQFN20 package. Product specification -
74ALVC245_1
20030710
74ALVC245_2
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 -- 7 January 2008
12 of 14
NXP Semiconductors
74ALVC245
Octal bus transceiver; 3-state
15. Legal information
15.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
15.3 Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
16. Contact information
For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com
74ALVC245_2
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 -- 7 January 2008
13 of 14
NXP Semiconductors
74ALVC245
Octal bus transceiver; 3-state
17. Contents
1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Contact information. . . . . . . . . . . . . . . . . . . . . 13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2008.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 7 January 2008 Document identifier: 74ALVC245_2

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